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Add hrs3300 write_reg and read_reg to simulator

Signed-off-by: Francesco Gazzetta <fgaz@fgaz.me>
This commit is contained in:
Francesco Gazzetta 2021-11-20 17:39:46 +01:00
parent 09af1440ef
commit 9a1964ce41

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@ -155,6 +155,12 @@ class HRS():
self._i = 0 self._i = 0
self._step = 1 self._step = 1
def read_reg(self, addr):
pass
def write_reg(self, addr, val):
pass
def enable(self): def enable(self):
pass pass