296 lines
8.5 KiB
C++
296 lines
8.5 KiB
C++
#include "drivers/SpiMaster.h"
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//#include <hal/nrf_gpio.h>
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//#include <hal/nrf_spim.h>
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#include <nrfx_log.h>
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#include <algorithm>
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using namespace Pinetime::Drivers;
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SpiMaster::SpiMaster(const SpiMaster::SpiModule spi, const SpiMaster::Parameters& params) : spi {spi}, params {params} {
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}
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bool SpiMaster::Init() {
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// if(mutex == nullptr) {
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// mutex = xSemaphoreCreateBinary();
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// ASSERT(mutex != nullptr);
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// }
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//
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// /* Configure GPIO pins used for pselsck, pselmosi, pselmiso and pselss for SPI0 */
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// nrf_gpio_pin_set(params.pinSCK);
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// nrf_gpio_cfg_output(params.pinSCK);
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// nrf_gpio_pin_clear(params.pinMOSI);
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// nrf_gpio_cfg_output(params.pinMOSI);
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// nrf_gpio_cfg_input(params.pinMISO, NRF_GPIO_PIN_NOPULL);
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// // nrf_gpio_cfg_output(params.pinCSN);
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// // pinCsn = params.pinCSN;
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//
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// switch (spi) {
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// case SpiModule::SPI0:
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// spiBaseAddress = NRF_SPIM0;
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// break;
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// case SpiModule::SPI1:
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// spiBaseAddress = NRF_SPIM1;
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// break;
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// default:
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// return false;
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// }
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//
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// /* Configure pins, frequency and mode */
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// spiBaseAddress->PSELSCK = params.pinSCK;
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// spiBaseAddress->PSELMOSI = params.pinMOSI;
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// spiBaseAddress->PSELMISO = params.pinMISO;
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//
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// uint32_t frequency;
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// switch (params.Frequency) {
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// case Frequencies::Freq8Mhz:
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// frequency = 0x80000000;
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// break;
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// default:
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// return false;
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// }
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// spiBaseAddress->FREQUENCY = frequency;
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//
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// uint32_t regConfig = 0;
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// switch (params.bitOrder) {
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// case BitOrder::Msb_Lsb:
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// break;
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// case BitOrder::Lsb_Msb:
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// regConfig = 1;
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// break;
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// default:
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// return false;
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// }
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// switch (params.mode) {
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// case Modes::Mode0:
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// break;
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// case Modes::Mode1:
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// regConfig |= (0x01 << 1);
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// break;
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// case Modes::Mode2:
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// regConfig |= (0x02 << 1);
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// break;
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// case Modes::Mode3:
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// regConfig |= (0x03 << 1);
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// break;
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// default:
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// return false;
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// }
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//
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// spiBaseAddress->CONFIG = regConfig;
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// spiBaseAddress->EVENTS_ENDRX = 0;
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// spiBaseAddress->EVENTS_ENDTX = 0;
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// spiBaseAddress->EVENTS_END = 0;
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//
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// spiBaseAddress->INTENSET = ((unsigned) 1 << (unsigned) 6);
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// spiBaseAddress->INTENSET = ((unsigned) 1 << (unsigned) 1);
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// spiBaseAddress->INTENSET = ((unsigned) 1 << (unsigned) 19);
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//
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// spiBaseAddress->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos);
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//
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// NRFX_IRQ_PRIORITY_SET(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 2);
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// NRFX_IRQ_ENABLE(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn);
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//
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// xSemaphoreGive(mutex);
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return true;
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}
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//void SpiMaster::SetupWorkaroundForFtpan58(NRF_SPIM_Type* spim, uint32_t ppi_channel, uint32_t gpiote_channel) {
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// // Create an event when SCK toggles.
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// NRF_GPIOTE->CONFIG[gpiote_channel] = (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos) | (spim->PSEL.SCK << GPIOTE_CONFIG_PSEL_Pos) |
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// (GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos);
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//
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// // Stop the spim instance when SCK toggles.
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// NRF_PPI->CH[ppi_channel].EEP = (uint32_t) &NRF_GPIOTE->EVENTS_IN[gpiote_channel];
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// NRF_PPI->CH[ppi_channel].TEP = (uint32_t) &spim->TASKS_STOP;
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// NRF_PPI->CHENSET = 1U << ppi_channel;
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// spiBaseAddress->EVENTS_END = 0;
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//
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// // Disable IRQ
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// spim->INTENCLR = (1 << 6);
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// spim->INTENCLR = (1 << 1);
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// spim->INTENCLR = (1 << 19);
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//}
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//void SpiMaster::DisableWorkaroundForFtpan58(NRF_SPIM_Type* spim, uint32_t ppi_channel, uint32_t gpiote_channel) {
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// NRF_GPIOTE->CONFIG[gpiote_channel] = 0;
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// NRF_PPI->CH[ppi_channel].EEP = 0;
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// NRF_PPI->CH[ppi_channel].TEP = 0;
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// NRF_PPI->CHENSET = ppi_channel;
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// spiBaseAddress->EVENTS_END = 0;
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// spim->INTENSET = (1 << 6);
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// spim->INTENSET = (1 << 1);
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// spim->INTENSET = (1 << 19);
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//}
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void SpiMaster::OnEndEvent() {
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if (currentBufferAddr == 0) {
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return;
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}
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// auto s = currentBufferSize;
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// if (s > 0) {
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// auto currentSize = std::min((size_t) 255, s);
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// PrepareTx(currentBufferAddr, currentSize);
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// currentBufferAddr += currentSize;
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// currentBufferSize -= currentSize;
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//
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// spiBaseAddress->TASKS_START = 1;
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// } else {
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// BaseType_t xHigherPriorityTaskWoken = pdFALSE;
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// if (taskToNotify != nullptr) {
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// vTaskNotifyGiveFromISR(taskToNotify, &xHigherPriorityTaskWoken);
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// portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
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// }
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//
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// nrf_gpio_pin_set(this->pinCsn);
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// currentBufferAddr = 0;
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// BaseType_t xHigherPriorityTaskWoken2 = pdFALSE;
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// xSemaphoreGiveFromISR(mutex, &xHigherPriorityTaskWoken2);
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// portYIELD_FROM_ISR(xHigherPriorityTaskWoken | xHigherPriorityTaskWoken2);
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// }
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}
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void SpiMaster::OnStartedEvent() {
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}
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//void SpiMaster::PrepareTx(const volatile uint32_t bufferAddress, const volatile size_t size) {
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// spiBaseAddress->TXD.PTR = bufferAddress;
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// spiBaseAddress->TXD.MAXCNT = size;
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// spiBaseAddress->TXD.LIST = 0;
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// spiBaseAddress->RXD.PTR = 0;
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// spiBaseAddress->RXD.MAXCNT = 0;
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// spiBaseAddress->RXD.LIST = 0;
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// spiBaseAddress->EVENTS_END = 0;
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//}
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//void SpiMaster::PrepareRx(const volatile uint32_t cmdAddress,
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// const volatile size_t cmdSize,
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// const volatile uint32_t bufferAddress,
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// const volatile size_t size) {
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// spiBaseAddress->TXD.PTR = 0;
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// spiBaseAddress->TXD.MAXCNT = 0;
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// spiBaseAddress->TXD.LIST = 0;
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// spiBaseAddress->RXD.PTR = bufferAddress;
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// spiBaseAddress->RXD.MAXCNT = size;
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// spiBaseAddress->RXD.LIST = 0;
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// spiBaseAddress->EVENTS_END = 0;
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//}
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bool SpiMaster::Write(uint8_t pinCsn, const uint8_t* data, size_t size, const std::function<void()>& preTransactionHook) {
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// if (data == nullptr)
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// return false;
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// auto ok = xSemaphoreTake(mutex, portMAX_DELAY);
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// ASSERT(ok == true);
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// taskToNotify = xTaskGetCurrentTaskHandle();
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//
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// this->pinCsn = pinCsn;
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//
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// if (size == 1) {
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// SetupWorkaroundForFtpan58(spiBaseAddress, 0, 0);
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// } else {
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// DisableWorkaroundForFtpan58(spiBaseAddress, 0, 0);
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// }
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//
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// nrf_gpio_pin_clear(this->pinCsn);
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//
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// currentBufferAddr = (uint32_t) data;
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// currentBufferSize = size;
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//
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// auto currentSize = std::min((size_t) 255, (size_t) currentBufferSize);
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// PrepareTx(currentBufferAddr, currentSize);
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// currentBufferSize -= currentSize;
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// currentBufferAddr += currentSize;
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// spiBaseAddress->TASKS_START = 1;
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//
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// if (size == 1) {
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// while (spiBaseAddress->EVENTS_END == 0)
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// ;
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// nrf_gpio_pin_set(this->pinCsn);
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// currentBufferAddr = 0;
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// xSemaphoreGive(mutex);
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// }
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return true;
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}
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bool SpiMaster::Read(uint8_t pinCsn, uint8_t* cmd, size_t cmdSize, uint8_t* data, size_t dataSize) {
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// xSemaphoreTake(mutex, portMAX_DELAY);
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//
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// taskToNotify = nullptr;
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//
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// this->pinCsn = pinCsn;
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// DisableWorkaroundForFtpan58(spiBaseAddress, 0, 0);
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// spiBaseAddress->INTENCLR = (1 << 6);
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// spiBaseAddress->INTENCLR = (1 << 1);
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// spiBaseAddress->INTENCLR = (1 << 19);
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//
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// nrf_gpio_pin_clear(this->pinCsn);
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//
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// currentBufferAddr = 0;
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// currentBufferSize = 0;
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//
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// PrepareTx((uint32_t) cmd, cmdSize);
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// spiBaseAddress->TASKS_START = 1;
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// while (spiBaseAddress->EVENTS_END == 0)
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// ;
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//
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// PrepareRx((uint32_t) cmd, cmdSize, (uint32_t) data, dataSize);
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// spiBaseAddress->TASKS_START = 1;
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//
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// while (spiBaseAddress->EVENTS_END == 0)
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// ;
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// nrf_gpio_pin_set(this->pinCsn);
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//
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// xSemaphoreGive(mutex);
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return true;
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}
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void SpiMaster::Sleep() {
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// while (spiBaseAddress->ENABLE != 0) {
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// spiBaseAddress->ENABLE = (SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos);
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// }
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// nrf_gpio_cfg_default(params.pinSCK);
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// nrf_gpio_cfg_default(params.pinMOSI);
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// nrf_gpio_cfg_default(params.pinMISO);
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NRF_LOG_INFO("[SPIMASTER] sleep");
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}
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void SpiMaster::Wakeup() {
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Init();
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NRF_LOG_INFO("[SPIMASTER] Wakeup");
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}
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bool SpiMaster::WriteCmdAndBuffer(uint8_t pinCsn, const uint8_t* cmd, size_t cmdSize, const uint8_t* data, size_t dataSize) {
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// xSemaphoreTake(mutex, portMAX_DELAY);
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//
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// taskToNotify = nullptr;
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//
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// this->pinCsn = pinCsn;
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// DisableWorkaroundForFtpan58(spiBaseAddress, 0, 0);
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// spiBaseAddress->INTENCLR = (1 << 6);
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// spiBaseAddress->INTENCLR = (1 << 1);
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// spiBaseAddress->INTENCLR = (1 << 19);
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//
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// nrf_gpio_pin_clear(this->pinCsn);
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//
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// currentBufferAddr = 0;
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// currentBufferSize = 0;
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//
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// PrepareTx((uint32_t) cmd, cmdSize);
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// spiBaseAddress->TASKS_START = 1;
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// while (spiBaseAddress->EVENTS_END == 0)
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// ;
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//
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// PrepareTx((uint32_t) data, dataSize);
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// spiBaseAddress->TASKS_START = 1;
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//
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// while (spiBaseAddress->EVENTS_END == 0)
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// ;
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// nrf_gpio_pin_set(this->pinCsn);
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//
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// xSemaphoreGive(mutex);
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return true;
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}
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